The present invention pertains to the field of semiconductor circuits. More particularly, the present invention pertains to semiconductor circuits having a transistor whose body is biased.
A conventional complementary metal oxide semiconductor (CMOS) transistor typically has to be able to provide a certain level of drive current in order to reliably communicate with or control or drive another device. The drive current is a function of the threshold voltage of the transistor and the voltage levels applied to the terminals of the transistor, among other factors. The threshold voltage, Vt, may be defined as the voltage applied between the gate and source below which the drive or drain-to-source current, Ids, drops to very close to zero.
Transistors which are designed to be used with relatively high voltage levels (high voltage level transistors) and which have a relatively high threshold voltage may produce relatively high drive currents if they are used in circuits supplying relatively high voltage levels. Problems, however, arise when attempting to use a high voltage level transistor in a low voltage level circuit. For example, if a transistor which is designed for use with 3.3 volts at its terminals is used in a circuit supplying 1.5 volts the drive current produced by the transistor is likely to be rather low in comparison to the same transistor used in a circuit providing 3.3 volts. An input/output (I/O) buffer is an example of a situation where multiple voltages may need to be supported by a transistor. Part of the low performance is due to the large threshold voltage inherent in a transistor designed for use with 3.3 volts. Typically, if a transistor is to be used with a large voltage applied to the source, source voltage, the gate oxide is made relatively thick in order to prevent oxide breakdown of the gate oxide which may render the transistor inoperable. Unfortunately, the threshold voltage increases as the thickness of the gate oxide of a transistor increases, causing the drive current to decrease. Consequently, when a transistor having a large threshold voltage is used with terminal voltages that are lower than the voltages it was designed to be used with, the drive current is typically relatively low.
However, the drive current can be increased by changing the threshold voltage. With a lower threshold voltage, a transistor can provide a greater drain current for a given voltage applied between the gate and source, Vgs. Circuit schemes have been proposed where a forward bias is applied statically or dynamically to the body node of a metal oxide semiconductor field effect transistor (MOSFET) to decrease the threshold voltage and increase the drive current when the MOSFET is turned on.
An example of a circuit scheme which allows transistors to have both a higher drive current when turned on and a lower leakage current when turned off is illustrated in FIGS. 1a and 1b. FIGS. 1a and 1b illustrate a circuit 100 which includes transistor 110 having a source 111 at a source voltage VCC, a drain 113, and a gate 112. Gate 112 is coupled to coupling capacitor 114 which in turn is coupled to the body 115 of transistor 110. Circuit 100 includes explicitly placed diode 117 which couples source 111 to tap 116. Transistor 110 includes parasitic diodes 115a and 115b. 
Transistor 110 is a p-channel metal oxide semiconductor (PMOS) transistor in which a body or substrate is a doped n type material, and source 111 and drain 113 are each of p+ type material. An n or n+ type material refers to material to which donor dopant has been added to increase the electron concentration. An n+ material has an even greater electron concentration than n type material. A p or p+ type material refers to material to which acceptor dopant has been added to increase the hole concentration. A p+ material has an even greater hole concentration than p type material. A n+ type tap provides a path from coupling capacitor 114 to body 115. When the gate voltage is low, a channel 118 provides a path between source 111 and drain 113. Transistor 110 has a threshold voltage Vt that may be defined as the voltage applied between the gate and source below which the drive or drain-to-source current, Ids, drops to very close to zero.
A body bias is applied to body 115 through tap 116. When transistor 110 is in an active mode, the body bias is such that a forward bias is applied to body 115. The threshold voltage without forward body bias is Vt(NFB). The threshold voltage with a forward bias is Vt(WFB). In practice, |Vt(WFB)| is lower than |Vt(NFB) |. With a lower threshold voltage, transistor 110 can provide a greater drive current for a given Vgs. For example, transistor 110 in a forward body bias condition can provide the same drive current with a lower Vgs as compared to transistor 110 not in a forward bias condition. Likewise, transistor 110 in a forward bias condition can provide a greater drive current with the same Vgs and Vcc as compared to transistor 110 not in a forward bias condition.
Since a forward bias has a tendency to increase leakage current of transistor 110, which is undesirable, it desirable to reverse bias body 115 when transistor 110 is off. In circuit 100, body 115 is reverse biased when transistor 110 is in an inactive mode and the body is at Vcc or a higher potential.
Unfortunately, circuit 100, since it was designed for use in the core of an integrated circuit, does not provide good electrostatic discharge (ESD) protection, has a capcitor 114 which takes up a relatively large area, and undergoes modulation of the threshold voltage due to noise.
During an ESD, kilovolts of voltage may be placed across a device for nanoseconds. One way to address this issue is to place an explicit large ESD diode 139 in parallel with transistor 130 as illustrated in FIG. 1c. FIG. 1c illustrates a circuit for biasing the body of a transistor having electrostatic discharge protection. Diode 139 is forward biased when drain 133 is at a higher voltage with respect to source supply voltage, Vcc. However due to high currents and resistance of diode 139, voltages upwards of 1 V may exist between drain 133 and the Vcc even when the ESD diode is clamping. Therefore, diode 135b and diode 137 are forward biased and conduct. Since diode 137 is small, it cannot handle large currents, and can be easily destroyed. Consequently, diode 137 either needs to be sized up significantly, or another mechanism for dealing with ESD""s needs to be provided. Increasing the size of diode 137 may be undesirable in applications where die area is limited.
Similarly, coupling capacitor 114 takes up a relatively large die area which may be undesirable in applications where area is limited.
Circuit 100 does not provide for the communication of the body bias produced by coupling capacitor 114 to bodies other than the body of the transistor to which capacitor 114 is coupled. In a typical I/O circuit which has actual drivers that communicate with an external bus, the impedance of the drivers is dynamically adjusted or compensated by using a calibration cell which contains a calibration driver whose impedance is matched to a reference impedance. The adjustments or compensation made to the calibration driver impedance are also made to the actual drivers. For the compensation to be properly made, a common bias needs to be used for both the actual drivers and the calibration driver or drivers. Since capacitor 114 does not provide for relatively easy and repeatable communication of substantially the same bias to multiple transistors, compensation may not be properly done.
Additionally, circuit 100 does not have a very good conduction path when it is operating between regions where diode 117 is conducting (gate 112 going from low to high) or when diode 115a is conducting (gate 112 going from high to low). This leaves a window between (Vcc+voltage drop across diode 117) and (Vccxe2x88x92voltage drop across diode 115a) when the N-well is relatively floating. Any I/O noise caused by reflections, bus switching, or other noise sources is coupled into the N-well and cannot be dissipated. This noise modulates the threshold voltage. The diodes 117 and 115a and capacitor 114 also form a peak detect circuit. For example if diode 115a is conducting, then the highest voltage achieved by the Vcc will bias the N-well to (Vccmaxxe2x88x92Vdiode 115a) level. When the source supply voltage, Vcc, collapses, the N-well cannot track as there is no conduction path.
Since ESD impulse may destroy a transistor, it is desirable to provide a relatively larger drive current when the transistor is turned on using a circuit scheme that will provide relatively better protection from ESD impulses without the area cost of an added ESD diode. Furthermore, since a coupling capacitor takes up a relatively large die area, it is desirable to provide a relatively larger drive current when the transistor is turned on using a circuit scheme that does not require a capacitor. Finally, it is desirable to provide a relatively larger driver current when the transistor is turned on using a circuit scheme that does not cause threshold voltage modulation.
According to one embodiment of the present invention a method for biasing a body of a transistor is described. The method includes detecting a voltage applied to a terminal of a transistor and coupling a biasing voltage to the body based upon the detected voltage.